Thanks for this article to ssleandro In this article we ‘ll se how to implement a template for a Combination Wave Generator that can be a Surge Generator, a Line Impedance Stabilization Networks (LISN), motor control, ripple current, etc. This model can be very useful for hardware engineers which can utilize it in their projects to speed up project development.
The platform used for the simulation is PSpice but it can easily replicated in other SPICE simulation software. The simplified model of the GPM consists of an High-Voltage source U, a charging resistor Rc, an energy storage capacitor Cc. This part of circuit is connected by a switch to 2 Pulse duration shaping resistors Rs, an impedance matching resistor Rm and a Rise time shaping indutor Lr, as in the picture below typical values of this components are: Cc=7.76μF, Rs1=14.8 Ohm, Rm=1.05 Ohm, Lr=9.74μH, Rs2=23.3 Ohm. The peak voltage on Rs2 can be 1KV, 2KV.6KV. In the following schematic we set the high voltage with the initial condition of the CapacitorCc, for example for 6KV, we set 6300 in the PSpice IC field of the Cc component. We can adjust the time in U1 to make surge hit at 90/270 degree or whatever phase we want. Calibration of Surge Generator. The IEC/EN 61000-4-5 standars requires the following waveform of open-circuit voltage with no Coupling/Decoupling network (CDN) connected This is the result of the simulation that shows a voltage waveform that fullfills requirementof IEC/EN 61000-4-5 Below the image of the waveform of short-circuit current with no CDN connected and here again the simulated results: Ipeak is about 1.5KA, T1 is 8uS and T2 is 20uS. The effective coupling impedance is 2Ohm. The simulated current waveform fulfills requirement of IEC/EN 61000-4-5 standards.
Unzip the file you provided into the subdirectory where you creating your LTSpice schematic. It contains two files. Rename the one that ends in.lib to be Infineon.lib (to shorten its name). Delete the app note file (or not). To verify that LTSpice can find the lib file, do file/open/Infineon.lib. It should open in a text window inside LTSpice. Get the symbol file below NMOSsub.asy and save it in the subdirectory where you are creating your LTSpice schematic.
Create a schematic. When you get to where you want to insert one of the Infineon FETs, insert an instance of the NMOSsub.asy (not nmos). To do this, click on the little nand gate icon, and change the TOP DIRECTORY pull-down to point to your local subdirectory, and then select the NMOSsub.asy from the list of available symbols. Remember to change it back if looking for a standard part. Now change the string subckt on the NMOS symbol to IPP65R190E6L3 (or any of the valid.subckt names in the lib file.) 6. Now add this directive to the schematic:.include.
Infineon.lib 7. You should have a simulatable circuit. I have included a small test file you can unzip into a clean subdirectory which you can look. Unzip the file you provided into the subdirectory where you creating your LTSpice schematic. It contains two files. Rename the one that ends in.lib to be Infineon.lib (to shorten its name). Delete the app note file (or not).
To verify that LTSpice can find the lib file, do file/open/Infineon.lib. It should open in a text window inside LTSpice.
Get the symbol file below NMOSsub.asy and save it in the subdirectory where you are creating your LTSpice schematic. Dell windows 7 sp1 iso download. Create a schematic.
When you get to where you want to insert one of the Infineon FETs, insert an instance of the NMOSsub.asy (not nmos). To do this, click on the little nand gate icon, and change the TOP DIRECTORY pull-down to point to your local subdirectory, and then select the NMOSsub.asy from the list of available symbols. Remember to change it back if looking for a standard part. Now change the string subckt on the NMOS symbol to IPP65R190E6L3 (or any of the valid.subckt names in the lib file.) 6. Now add this directive to the schematic:.include. Infineon.lib 7.
You should have a simulatable circuit. I have included a small test file you can unzip into a clean subdirectory which you can look. Unzip the file you provided into the subdirectory where you creating your LTSpice schematic. It contains two files. Rename the one that ends in.lib to be Infineon.lib (to shorten its name).
Delete the app note file (or not). To verify that LTSpice can find the lib file, do file/open/Infineon.lib. It should open in a text window inside LTSpice. Get the symbol file below NMOSsub.asy and save it in the subdirectory where you are creating your LTSpice schematic. Create a schematic. When you get to where you want to insert one of the Infineon FETs, insert an instance of the NMOSsub.asy (not nmos). To do this, click on the little nand gate icon, and change the TOP DIRECTORY pull-down to point to your local subdirectory, and then select the NMOSsub.asy from the list of available symbols.
Import Pspice Model Into Ltspice
Remember to change it back if looking for a standard part. Now change the string subckt on the NMOS symbol to IPP65R190E6L3 (or any of the valid.subckt names in the lib file.) 6.
Now add this directive to the schematic:.include. Infineon.lib 7. You should have a simulatable circuit. I have included a small test file you can unzip into a clean subdirectory which you can look. Click to expand.Hi MikeML I asked TI for an unencrypted model.
Their reply: 'only per our distributors' request and assessing their customers' projects'. Not very helpful as I need it fast. The irony is the transformer designed to work with this chip, the spice model is available in LTspice and the chip spice model only in Pspice. The reason I wanted to simulate is because my flyback SMPS prototype is not working because there's no voltage on the auxiliary to provide energy to the VDD to switch the IC on. Any idea as to why this is? Thanks for your help.